送交者: CP 于 2005-2-03, 23:02:56:
Dear All:
Please visit my site at:
http://mysite.verizon.net/~vze26krk/CPM.html
There, I will discuss the end of Moore's law, and a new computer
architecture with I have proposed in 2003. Here is the abstract of my
paper:
"A novel memory with limited processing power and internal connectivity
at each element is proposed. This memory carries out parallel processing
within itself. Many common algorithms using this memory are discussed. For
an array of N items, it reduces the total instruction cycle count of
universal operations such as insertion and match finding to ~ 1, local
operations such as filtering and pattern recognition to ~ local operation
size, and global operations such as sum and sorting to ~ sqrt(N).
Particularly, it eliminates most streaming activities for data processing
purpose on the data bus. Yet it remains general purposed, easy to use, pin
compatible with conventional memory, and practical for implementation. In
addition, some new designs, such as all-line decoder, general decoder,
parallel shifter, parallel comparator, parallel adder and parallel divider,
are presented."
Please drop a line to my email at: Chengpu@gmail.com
Regards,
Chengpu Wang